The Drivven IP Core library is a collection of programmable logic IP, coded in verilog, to handle a wide variety of automotive control tasks within programmable logic such as FPGAs.  

Most engine control systems rely on a microcontroller, having fixed resources, to handle engine control tasks such as tracking the angular position of the crankshaft and generating engine synchronous outputs for fuel or spark events.  These tasks can become significant processor loads, depending on engine speed, and often require a microprocessor having higher throughput capabilities or highly specialized peripherals that would otherwise not be needed.  Successful implementation often requires clever asynchronous external interrupt handling solutions which can be difficult to debug.  Using programmable logic to perform these critical engine synchronous tasks in parallel offers many benefits, such as:

• Specialized automotive microcontrollers are no longer necessary, giving way to generic CPU chips or CPU cores within the FPGA fabric.

• External asynchronous interrupts are minimized since custom event handling can be coded into the FPGA fabric.  

• Generic CPUs allow compilers and auto-code generators to be less specialized.  

• Peripheral I/O cores can be parametrically optimized at synthesis time to accommodate unique requirements such as a 17-bit counter, whereas microcontrollers only offer what the manufacturers think is needed.

• FPGA designs can be updated at any time in the design process - even after deployment.  Any ASIC design change is costly.

• Most FPGA IP cores, including those designed by Drivven, can be synthesized for any FPGA, thus eliminating silicon obsolescence concerns and increasing silicon manufacturer competition for your existing design.

The Drivven Engine Management IP Core library can be used in both embedded and PC-based development platforms which contain programmable logic resources.  The embedded platform is specialized hardware designed for a specific application and requires programmable logic to be incorporated into the system at an early design stage.  These designs must utilize cost sensitive FPGAs interfaced to generic CPUs or utilize a growing selection of soft processor cores.  This technology, combined with Drivven automotive IP allows a very flexible design process, even for production electronics.  

PC-based platforms offer powerful control and data acquisition solutions and are readily available by piecing together a wide range of software tools and I/O cards.  The highest performance FPGA technology can be found in these products.  Drivven's powertrain control development products employ such hardware and software tools from National Instruments.  Without an FPGA, engine control can be a difficult task for PC-based systems because engine synchronous events are required.  PCs, by themselves, are not efficient at handling such events in software.  An effective solution is to add an FPGA I/O device to the system and locate all engine synchronous event-scheduling tasks within the FPGA for parallel processing.  The Drivven Engine Management IP Core Library, as implemented within the Drivven CompactRIO Module Kits, allows the developer to configure a PC/FPGA control system for a wide variety of engine configurations, and then, if necessary, migrate to embedded FPGA-based hardware.